Interrupt Flag Status and Clear

Name:
INTFLAG
Offset:
0x18 [ID-0000120d]
Reset:
0x00000000
Access:
Bit3130292827262524
EVDn[11:8]
AccessR/WR/WR/WR/W
Reset0000
Bit2322212019181716
EVDn[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit15141312111098
OVRn[11:8]
AccessR/WR/WR/WR/W
Reset0000
Bit76543210
OVRn[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 27:16 – EVDn: Event Detected Channel n [n=11..0]

Event Detected Channel n [n=11..0]

This flag is set on the next CLK_EVSYS_APB cycle when an event is being propagated through the channel, and an interrupt request will be generated if INTENCLR/SET.EVDn is '1'.

When the event channel path is asynchronous, the EVDn interrupt flag will not be set.

Writing '0' to this bit has no effect.

Writing '1' to this bit will clear the Event Detected Channel n interrupt flag.

Bits 11:0 – OVRn: Overrun Channel n [n=11..0]

Overrun Channel n [n=11..0]

This flag is set on the next CLK_EVSYS_APB cycle when an event is being propagated through the channel, and an interrupt request will be generated if INTENCLR/SET.OVRn is '1'.

When the event channel path is asynchronous, the OVRn interrupt flag will not be set.

Writing '0' to this bit has no effect.

Writing '1' to this bit will clear the Overrun Detected Channel n interrupt flag.