When using the I2C slave with
DMA, an address match will cause the address interrupt flag (INTFLAG.ADDRMATCH) to be
raised. After the interrupt has been serviced, data transfer will be performed through
DMA.
The I2C slave generates the
following requests:
- Write data received (RX): The request is set when master write data is received. The request is cleared when DATA is read.
- Read data needed for transmit (TX): The request is set when data is needed for a master read operation. The request is cleared when DATA is written.