Performance Level Configuration

Name:
PLCFG
Offset:
0x02 [ID-00000a2f]
Reset:
0x00
Access:
PAC Write-Protection
Bit76543210
PLDISPLSEL[1:0]
AccessR/WR/WR/W
Reset000

Bit 7 – PLDIS: Performance Level Disable

Performance Level Disable

Disabling the automatic PL selection forces the device to run in PL0 , reducing the power consumption and the wake-up time from standby sleep mode.

Changing this bit when the current performance level is not PL0 is discarded and a violation is reported to the PAC module.

ValueDescription
0 The Performance Level mechanism is enabled.
1 The Performance Level mechanism is disabled.

Bits 1:0 – PLSEL[1:0]: Performance Level Select

Performance Level Select

Value Name Definition
0x0 PL0 Performance Level 0
0x1 Reserved Reserved
0x2 PL2 Performance Level 2
0x3 Reserved Reserved