Priority Control 0
Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RRLVLEN3 | LVLPRI3[3:0] | ||||||
AccessR/W | R/W | R/W | R/W | R/W | |||
Reset0 | 0 | 0 | 0 | 0 | |||
Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RRLVLEN2 | LVLPRI2[3:0] | ||||||
AccessR/W | R/W | R/W | R/W | R/W | |||
Reset0 | 0 | 0 | 0 | 0 | |||
Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RRLVLEN1 | LVLPRI1[3:0] | ||||||
AccessR/W | R/W | R/W | R/W | R/W | |||
Reset0 | 0 | 0 | 0 | 0 | |||
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RRLVLEN0 | LVLPRI0[3:0] | ||||||
AccessR/W | R/W | R/W | R/W | R/W | |||
Reset0 | 0 | 0 | 0 | 0 |
Level 3 Round-Robin Arbitration Enable
This bit controls which arbitration scheme is selected for DMA channels with priority level 3. For details on arbitration schemes, refer to Arbitration.
Value | Description |
---|---|
0 | Static arbitration scheme for channels with level 3 priority. |
1 | Round-robin arbitration scheme for channels with level 3 priority. |
Level 3 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN3=1) for priority level 3, this register holds the channel number of the last DMA channel being granted access as the active channel with priority level 3.
When static arbitration is enabled (PRICTRL0.RRLVLEN3=0) for priority level 3, and the value of this bit group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN3 written to '0').
Level 2 Round-Robin Arbitration Enable
This bit controls which arbitration scheme is selected for DMA channels with priority level 2. For details on arbitration schemes, refer to Arbitration.
Value | Description |
---|---|
0 | Static arbitration scheme for channels with level 2 priority. |
1 | Round-robin arbitration scheme for channels with level 2 priority. |
Level 2 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN2=1) for priority level 2, this register holds the channel number of the last DMA channel being granted access as the active channel with priority level 2.
When static arbitration is enabled (PRICTRL0.RRLVLEN2=0) for priority level 2, and the value of this bit group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN2 written to '0').
Level 1 Round-Robin Scheduling Enable
For details on arbitration schemes, refer to Arbitration.
Value | Description |
---|---|
0 | Static arbitration scheme for channels with level 1 priority. |
1 | Round-robin arbitration scheme for channels with level 1 priority. |
Level 1 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN1=1) for priority level 1, this register holds the channel number of the last DMA channel being granted access as the active channel with priority level 1.
When static arbitration is enabled (PRICTRL0.RRLVLEN1=0) for priority level 1, and the value of this bit group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN1 written to '0').
Level 0 Round-Robin Scheduling Enable
For details on arbitration schemes, refer to Arbitration.
Value | Description |
---|---|
0 | Static arbitration scheme for channels with level 0 priority. |
1 | Round-robin arbitration scheme for channels with level 0 priority. |
Level 0 Channel Priority Number
When round-robin arbitration is enabled (PRICTRL0.RRLVLEN0=1) for priority level 0, this register holds the channel number of the last DMA channel being granted access as the active channel with priority level 0.
When static arbitration is enabled (PRICTRL0.RRLVLEN0=0) for priority level 0, and the value of this bit group is non-zero, it will not affect the static priority scheme.
This bit group is not reset when round-robin arbitration gets disabled (PRICTRL0.RRLVLEN0 written to '0').