Data Register

PORTx is an 8-bit wide, bidirectional port. The corresponding data direction register is TRISx. Setting a TRISx bit (‘1’) will make the corresponding PORTA pin an input (i.e., disable the output driver). Clearing a TRISx bit (‘0’) will make the corresponding PORTx pin an output (i.e., it enables output driver and puts the contents of the output latch on the selected pin). EXAMPLE-1: Initializing PORTA shows how to initialize PORTA.

Reading the PORTx register reads the status of the pins, whereas writing to it will write to the PORT latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read, this value is modified and then written to the PORT data latch (LATx).

The PORT data latch LATx holds the output port data and contains the latest value of a LATx or PORTx write.

EXAMPLE-1: Initializing PORTA

; This code example illustrates initializing the PORTA register.
;  The other ports are initialized in the same manner.
        CLRF    LATA             ; Set all output bits to zero
        MOVLW   B'11111000'      ; Set RA<7:3> as inputs and RA<2:0> as outputs
        MOVWF   TRISA            ;  
        BANKSEL ANSELA
        CLRF    ANSELA           ; All pins are digital I/O