OSCCON3
0
, the user may
not see this bit set because the bit is set for less than one instruction
cycle.Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CSWHOLD | SOSCPWR | ORDY | NOSCR | ||||
AccessR/W/HC | R/W | RO | RO | ||||
Reset0 | 0 | 0 | 0 |
Clock Switch Hold bit
Value | Description |
---|---|
1 |
Clock switch will hold (with interrupt) when the oscillator selected by NOSC is ready |
0 |
Clock switch
may proceed when the oscillator selected by NOSC is ready; when NOSCR becomes
‘1 ’, the switch will occur |
Secondary Oscillator Power Mode Select bit
Value | Description |
---|---|
1 |
Secondary oscillator operating in High-Power mode |
0 |
Secondary oscillator operating in Low-Power mode |
Oscillator Ready bit (read-only)
Value | Description |
---|---|
1 |
OSCCON1 = OSCCON2; the current system clock is the clock specified by NOSC |
0 |
A clock switch is in progress |
New Oscillator is Ready bit (read-only)(1)
Value | Description |
---|---|
1 |
A clock switch is in progress and the oscillator selected by NOSC indicates a ready condition |
0 |
A clock switch is not in progress, or the NOSC-selected oscillator is not yet ready |