TMR0L
Timer0 Period/Count Low Register
Name:
TMR0L
Address:
0xFD2
Reset:
Access:
Bit
7
6
5
4
3
2
1
0
TMR0L[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – TMR0L[7:0]: TMR0 Least Significant Counter
TMR0 Least Significant Counter
Value
Name
Description
0 to 255
T016BIT
=
0
8-bit Timer0 Counter bits
0 to 255
T016BIT
=
1
16-bit Timer0 Least Significant Byte