Typical Receive Sequence:
- 1.The user generates a Start condition by setting the SEN bit.
- 2.SSPxIF is set by hardware on completion of the Start.
- 3.SSPxIF is cleared by software.
- 4.User writes SSPxBUF with the slave address to transmit and the
R/W
bit set.
- 5.Address is shifted out the SDA pin until all eight bits are transmitted. Transmission begins as soon as SSPxBUF is written to.
- 6.The MSSP module shifts in the ACK bit from the slave device and writes its value into the ACKSTAT bit.
- 7.The MSSP module generates an interrupt at the end of the ninth clock cycle by setting the SSPxIF bit.
- 8.User sets the RCEN bit and
the master clocks in a byte from the slave.
- 9.After the eighth falling edge of SCL, SSPxIF and BF are set.
- 10.Master clears SSPxIF and reads the received byte from SSPUF
which clears BF.
- 11.Master sets the ACK value to be sent to slave in the ACKDT bit and initiates the ACK by setting the ACKEN bit.
- 12.Master’s ACK is clocked out to the slave and SSPxIF is set.
- 13.User clears SSPxIF.
- 14.Steps 8-13 are repeated for each received byte from the slave.
- 15.Master sends a not ACK or Stop to end communication.
Figure 1. I2C
Master Mode Waveform (Reception, 7-bit Address)