The SAM D11 Xplained Pro header EXT1 offers access to the I/O of the microcontroller in order to expand the board e.g. by connecting extensions to the board. This header is based on the standard extension header specified in Table 1. The header has a pitch of 2.54mm.
| Pin on EXT1 | SAM D11 pin | Function | Shared functionality |
|---|---|---|---|
| 1 [ID] | - | - | Communication line to ID chip on extension board. |
| 2 [GND] | - | - | GND |
| 3 [ADC(+)] | PA02 | AIN[0] | QTouch Button 1 |
| 4 [ADC(-)] | PA03 | AIN[1] | QTouch Button 2 |
| 5 [GPIO1] | PA04 | GPIO | |
| 6 [GPIO2] | PA05 | GPIO | |
| 7 [PWM(+)] | PA16 | TC1/WO[0] | LED0 and EDBG GPIO |
| 8 [PWM(-)] | PA17 | TC1/WO[1] | EDBG GPIO |
| 9 [IRQ/GPIO] | PA14 | NMI | SW0 and EDBG GPIO |
| 10 [SPI_SS_B/GPIO] | PA15 | GPIO | EDBG GPIO |
| 11 [TWI_SDA] | PA22 | SERCOM1 PAD[0] I²C SDA | EDBG I²C |
| 12 [TWI_SCL] | PA23 | SERCOM1 PAD[1] I²C SCL | EDBG I²C |
| 13 [USART_RX] | PA11 | SERCOM2 PAD[3] UART RX | EDBG CDC |
| 14 [USART_TX] | PA10 | SERCOM2 PAD[2] UART TX | EDBG CDC |
| 15 [SPI_SS_A] | PA08 | SERCOM0 PAD[2] SPI SS | 32kHz Crystal footprint |
| 16 [SPI_MOSI] | PA06 | SERCOM0 PAD[0] SPI MOSI | EDBG SPI |
| 17 [SPI_MISO] | PA09 | SERCOM0 PAD[3] SPI MISO | 32kHz Crystal footprint and EDBG SPI |
| 18 [SPI_SCK] | PA07 | SERCOM0 PAD[1] SPI SCK | EDBG SPI |
| 19 [GND] | - | - | GND |
| 20 [VCC] | - | - | VCC |