Events

The RTC, when enabled, will generate the following output Events:

• Overflow (OVF): Generated when the counter has reached its top value and wrapped to zero.
• Compare (CMP): Indicates a match between the counter value and the compare register.

The PIT, when enabled, will generate the following output Events:

• Event 0: 8192 RTC clock periods interval.
• Event 1: 4096 RTC clock periods interval.
• Event 2: 2048 RTC clock periods interval.
• Event 3: 1024 RTC clock periods interval.
• Event 4: 512 RTC clock periods interval.
• Event 5: 256 RTC clock periods interval.
• Event 6: 128 RTC clock periods interval.
• Event 7: 64 RTC clock periods interval.

The Event users are configured by the Event System (EVSYS).