| Document |
- Section Conventions added.
- Peripheral
sections: document structure updated.
- Presentation of 16-bit registers updated.
- Editorial updates
throughout the document.
|
| Pinout |
- Updated diagrams, legends.
|
| SYSCFG - System Configuration |
- Content on debugging removed; see UPDI.
- Moved into
section Memories.
|
| I/O Multiplexing and Considerations |
- Signal names updated throughout the document.
|
| AVR CPU |
- Invalid registers removed.
|
| CLKCTRL - Clock Controller |
- Bit field in peripherals for clock selection is CLKSEL.
- CLKCTRL.XOSC32KCTRLA is under Configuration Change
Protection.
|
| FUSES - Configuration and User Fuses |
- OSCLOCK in FUSE.OSCCFG is loaded to LOCK in
CLKCTRL.OSC20MCALIBB.
- SIGROW.TCD0CFG[7:4] - bit field names updated.
|
| NVMCTRL - Non Volatile Memory Controller |
- Flash sections re-organized.
- Command value expected within four instructions.
|
| SLPCTRL - Sleep Controller |
- Abbreviation
SLPCTRL.
- Behavior of peripherals in sleep modes updated.
|
| CPUINT - CPU Interrupt Controller |
- CPUINT.LVL0PRI has no effect when Round Robin disabled.
|
| EVSYS - Event System |
- CLKCTRL is no event user/generator.
- Signals EVOUT[2:0] added.
|
| BOD - Brownout Detector |
- Register at 0x08 is BOD.VLMCTRLA.
|
| TCA - 16-bit Timer/Counter Type A |
- Definitions updated.
- TCA clock is CLK_PER.
- CMPnOV in
TCA.CTRLC.
|
| TCB - 16-bit Timer/Counter Type B |
- Definitions updated.
- Compare/Capture register is called TCB.CCMP.
|
| TCD - 12-bit Timer/Counter Type D |
- Input mode names updated.
|
| RTC - Real Time Counter |
- Runs in Idle sleep mode, and in Standby sleep mode if
RUNSDTBY=1.
- RTC.CLKSEL: Bit
field renamed CLKSEL.
- Name pattern for Busy flags in RTC.STATUS is 'xxxBUSY'.
- Invalid bit fields removed.
|
| USART - Universal Synchronous and Asynchronous Receiver and Transmitter |
- Clock source is CLK_PER.
- USART.RXDATA is read-only.
- RXCIF and DREIF in USART.STATUS are read-only.
- Interrupt RXC is shared between RXCIE and ABEIE.
|
| TWI - Two Wire Interface |
- Supports Fm+ at 1MHz.
- No bridge mode supported.
|
| CRCSCAN - Cyclic Redundancy Check Memory Scan |
|
| CCL – Configurable Custom Logic |
- LUT Control register name pattern is 'CCL.LUTnCTRLx'.
- Signal names updated.
- CCL.LUTCTRLBn: Description for INSEL1 updated.
|
| ADC - Analog to Digital Converter |
- Free-running mode
not available.
- SAMCAP=1 in ADC.CTRLC reduces sampling capacitance.
- Bit field at ADC.CTRLD[7:5] is INITDLY.
- Register at 0x05 is called ADC.SAMPCTRL.
- Register at 0x0C is called ADC.DBGCTRL.
- Invalid register bits removed.
|
| DAC - Digital to Analog Converter |
|
| AC – Analog Comparator |
- Inputs have name pattern 'AINxn'.
- Band gap-derived DAC and AC voltage reference from VREF
available as input.
- Bit AC.CTRLA[3] is LPMODE (Low Power Mode).
|
| UPDI - Unified Program and Debug Interface |
- Abbreviation
UPDI.
- Invalid register bits hidden.
- Output Enable Timer Protection for GPIO Configuration is
8.8ms.
- UPDI clock adjusted by UPDICLKSEL in UPDI.ASI_CTRLA.
- Register Description: ranges for physical configuration
registers and ASI level registers updated.
- CS address block notation updated.
|
| Electrical Characteristics |
- Updated/expanded:
- General Operating Ratings
- Voltage Protection
- Added:
- Power Consumption
- Wake-Up Time
- Peripherals Power Consumption
- RESET
- Oscillators and Clocks
- I/O Pin Characteristics
- Bandgap and VREF
- DAC, ADC, AC
|
| Typical Characteristics |
- Power Consumption plots updated and expanded.
- New sections added: GPIO, VREF, BOD, ADC, AC OSC20M,
OSCULP32K.
|