Interrupt Control
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TRIGB | TRIGA | OVF | |||||
Access | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 |
Counter Overflow
Writing this bit to '1' enables executing an interrupt at restart of the sequence or overflow of the counter.
Trigger x Interrupt Enable
Writing this bit to '1' enables executing an interrupt when trigger input x is received.