PIR4
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TMR6IF | TMR5IF | TMR4IF | TMR3IF | TMR2IF | TMR1IF | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
TMR6 to PR6 Match Interrupt Flag bit
Value | Description |
---|---|
1 | TMR6 to PR6 match occurred (must be cleared in software) |
0 | No TMR6 to PR6 match occurred |
TMR5 Overflow Interrupt Flag bit
Value | Description |
---|---|
1 | TMR5 register overflowed (must be cleared in software) |
0 | TMR5 register did not overflow |
TMR4 to PR4 Match Interrupt Flag bit
Value | Description |
---|---|
1 | TMR4 to PR4 match occurred (must be cleared in software) |
0 | No TMR4 to PR4 match occurred |
TMR3 Overflow Interrupt Flag bit
Value | Description |
---|---|
1 | TMR3 register overflowed (must be cleared in software) |
0 | TMR3 register did not overflow |
TMR2 to PR2 Match Interrupt Flag bit
Value | Description |
---|---|
1 | TMR2 to PR2 match occurred (must be cleared in software) |
0 | No TMR2 to PR2 match occurred |
TMR1 Overflow Interrupt Flag bit
Value | Description |
---|---|
1 | TMR1 register overflowed (must be cleared in software) |
0 | TMR1 register did not overflow |