TBLPTR
Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
TBLPTR21 | TBLPTRU[4:0] | ||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TBLPTRH[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TBLPTRL[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
NVM Most Significant Address bit
Value | Description |
---|---|
1 | Access Configuration, User ID, Device ID, and Revision ID spaces |
0 | Access Program Flash Memory space |
NVM Upper Address bits
High Byte of NVM Address bits
Low Byte of NVM Address bits