ADC

A clarification has been made to the electrical characteristics for the ADC peripheral:
Table 1. Clock and Timing Characteristics
Symbol Description Conditions Min. Typ. Max. Unit
fADC Sample rate 1.1V ≤ VREF 15 - 115 ksps
1.1V ≤ VREF (8-bit resolution) 15 - 150
VREF=0.55V (10-bit) 7.5 - 20
CLKADC Clock frequency VREF=0.55V (10-bit) 100 - 260 kHz
1.1V ≤ VREF (10-bit) 200 - 1500
1.1V ≤ VREF (8-bit resolution) 200 - 2000(1)
Ts Sampling time 2 2 33 CLKADC cycles
TCONV Conversion time (latency) Sampling time = 2CLKADC 8.7 - 50 µs
TSTART Start-up time Internal VREF - 22 - µs
Note:
  1. 1.50% duty cycle is required for clock frequencies above 1500 kHz.