TIMEOUT Bits in the TWI.MCTRLB Register are Not Accessible

The TIMEOUT bits in the TWI.MCTRLB register are not accessible from software.

Work around

When initializing TWI, BUSSTATE in TWI.MSTATUS should be brought into IDLE state by writing 0x1 to it.

Affected Silicon Revisions

Rev. A Rev. B            
X X            
Parent topic: TWI - Two-Wire Interface