ADC Noise Reduction Mode

When the SMCR.SM is written to '0x001', the SLEEP instruction makes the MCU enter ADC Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts and the Watchdog to continue operating (if enabled). This sleep mode basically halts clkI/O, clkCPU, and clkNVM, while allowing the other clocks to run.

This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is enabled, a conversion starts automatically when this mode is entered.

This mode is available in all devices, although only ATtiny5/10 are equipped with an ADC.