Interrupt vectors are described in the table below.
Vector No. | Program Address | Source | Interrupt Definition |
---|---|---|---|
1 | 0x000 | RESET | External Pin, Power-on Reset, VLM Reset and Watchdog Reset |
2 | 0x001 | INT0 | External Interrupt Request 0 |
3 | 0x002 | PCINT0 | Pin Change Interrupt Request 0 |
4 | 0x003 | TIM0_CAPT | Timer/Counter0 Capture |
5 | 0x004 | TIM0_OVF | Timer/Counter0 Overflow |
6 | 0x005 | TIM0_COMPA | Timer/Counter0 Compare Match A |
7 | 0x006 | TIM0_COMPB | Timer/Counter0 Compare Match B |
8 | 0x007 | ANA_COMP | Analog Comparator |
9 | 0x008 | WDT | Watchdog Time-out Interrupt |
10 | 0x009 | VLM | VCC Voltage Level Monitor |
11 | 0x00A | ADC | ADC Conversion Complete(1) |
In case the program never enables an interrupt source, the Interrupt Vectors will not be used and, consequently, regular program code can be placed at these locations.
The most typical and general program setup for the Reset and Interrupt Vector Addresses in this device is:
Address | Labels | Code | Comments |
0x000 | rjmp | RESET | ; Reset Handler |
0x001 | rjmp | INT0 | ; IRQ0 Handler |
0x002 | rjmp | PCINT0 | ; PCINT0 Handler |
0x003 | rjmp | TIM0_CAPT | ; Timer0 Capture Handler |
0x004 | rjmp | TIM0_OVF | ; Timer0 Overflow Handler |
0x005 | rjmp | TIM0_COMPA | ; Timer0 Compare A Handler |
0x006 | rjmp | TIM0_COMPB | ; Timer0 Compare B Handler |
0x007 | rjmp | ANA_COMP | ; Analog Comparator Handler |
0x008 | rjmp | WDT | ; Watchdog Interrupt Handler |
0x009 | rjmp | VLM | ; Voltage Level Monitor Handler |
0x00A | rjmp | ADC | ; ADC Conversion Handler |
<continues> | ... | ... | ... |
<continued> | |||
0x000B | RESET: ldi | r16, high (RAMEND) | ; Main program start |
0x000C | out | SPH,r16 | ; Set Stack Pointer |
0x000D | ldi | r16, low (RAMEND) | ; to top of RAM |
0x000E | out | SPL,r16 | |
0x000F | sei | ; Enable interrupts | |
0x0010 | <instr> | ||
... | ... |