The default mode is unbuffered in the transmit direction and single buffered in the receive direction. This means that bytes to be transmitted cannot be written to the SPI.DATA register before the entire shift cycle is completed. When receiving data, a received character must be read from the SPI.DATA register before the next character has been completely shifted in. Otherwise, the first byte will be lost.
The SPI peripheral is single buffered in the transmit direction and double buffered in the receive direction. A byte written to the transmit register will be copied to the shift register when a full character has been received. When receiving data, a received character must be read from the SPI.DATA register before the third character has been completely shifted in to avoid losing data.
The SPI peripheral is single buffered in the transmit direction and double buffered in the receive direction. A byte written to the transmit register will be copied to the shift register when the SPI is enabled and SS is high.