In One Ramp Mode, TCD counter counts up until it
reaches the CMPBCLR value. Then the TCD cycle is done
and the counter restarts from 0x000, beginning a new TCD cycle. The TCD cycle period is
TTCD_cycle=(CMPBCLR+1)fCLK_TCD_CNT
Figure 1. One Ramp Mode
In the figure above,
CMPASET < CMPACLR < CMPBSET < CMPBCLR.
This is required in One Ramp Mode to avoid overlapping outputs. The figure below is an
example where
CMPBSET < CMPASET < CMPACLR < CMPBCLR, resulting in an
overlap of the outputs.
Figure 2. One Ramp Mode with CMPBSET
< CMPASET
If any of the other compare values are bigger than CMPBCLR it will never be
triggered when running in One ramp mode. And if The CMPACLR is smaller than the CMPASET
value, the clear value will not have any effect.