Interrupts

Table 1. Available Interrupt Vectors and Sources in Normal Mode For Devices With Up to 8 KB Flash
Offset	Name	Vector Description	Conditions
0x00	OVF	Overflow and compare match interrupt	The counter has reached its top value and wrapped to zero.
0x04	CMP0	Compare channel 0 interrupt	Match between the counter value and the Compare 0 register.
0x06	CMP1	Compare channel 1 interrupt	Match between the counter value and the Compare 1 register.
0x08	CMP2	Compare channel 2 interrupt	Match between the counter value and the Compare 2 register.

Table 2. Available Interrupt Vectors and Sources in Normal Mode For Devices With More Than 8 KB Flash
Offset	Name	Vector Description	Conditions
0x00	OVF	Overflow and compare match interrupt	The counter has reached its top value and wrapped to zero.
0x08	CMP0	Compare channel 0 interrupt	Match between the counter value and the Compare 0 register.
0x0A	CMP1	Compare channel 1 interrupt	Match between the counter value and the Compare 1 register.
0x0E	CMP2	Compare channel 2 interrupt	Match between the counter value and the Compare 2 register.

Table 3. Available Interrupt Vectors and Sources in Split Mode For Devices With Up to 8 KB Flash
Offset	Name	Vector Description	Conditions
0x00	LUNF	Low byte underflow interrupt	Low byte timer reaches BOTTOM.
0x02	HUNF	High byte underflow interrupt	High byte timer reaches BOTTOM.
0x04	LCMP0	Compare channel 0 interrupt	Match between the counter value and the low byte of Compare 0 register.
0x06	LCMP1	Compare channel 1 interrupt	Match between the counter value and the low byte of Compare 1 register.
0x08	LCMP2	Compare channel 2 interrupt	Match between the counter value and the low byte of the Compare 2 register.

Table 4. Available Interrupt Vectors and Sources in Split Mode For Devices With More Than 8 KB Flash
Offset	Name	Vector Description	Conditions
0x00	LUNF	Low byte underflow interrupt	Low byte timer reaches BOTTOM.
0x04	HUNF	High byte underflow interrupt	High byte timer reaches BOTTOM.
0x08	LCMP0	Compare channel 0 interrupt	Match between the counter value and the low byte of Compare 0 register.
0x0A	LCMP1	Compare channel 1 interrupt	Match between the counter value and the low byte of Compare 1 register.
0x0E	LCMP2	Compare channel 2 interrupt	Match between the counter value and the low byte of the Compare 2 register.

When an interrupt condition occurs, the corresponding interrupt flag is set in the Interrupt Flags register of the peripheral (peripheral.INTFLAGS).

An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral's Interrupt Control register (peripheral.INTCTRL).

An interrupt request is generated when the corresponding interrupt source is enabled and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral's INTFLAGS register for details on how to clear interrupt flags.