Signal Description

Table 1. Signals in Master and Slave Mode
Signal Description Pin Configuration
Master Mode Slave Mode
MOSI Master Out Slave In User defined Input
MISO Master In Slave Out Input User defined
SCK Slave clock User defined Input
SS Slave select User defined Input

When the SPI module is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden according to Table 1.

The data direction of the pins with "User defined" pin configuration is not controlled by the SPI: The data direction is controlled by the application software configuring the port peripheral. If these pins are configured with data direction as input, they can be used as regular I/O pin inputs. If these pins are configured with data direction as output, their output value is controlled by the SPI. The MISO pin has a special behavior: When the SPI is in Slave mode and the MISO pin is configured as an output, the SS pin controls the output buffer of the pin: If SS is low, the output buffer drives the pin, if SS is high, the pin is tri-stated.

The data direction of the pins with "Input" pin configuration is controlled by the SPI hardware.