Stack Pointer Register Low and High byte

When addressing I/O Registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.

Reset value of SPL is RAMEND.

Name:
SPL and SPH
Offset:
0x5D [ID-000004d0]
Reset:
0xXX
Access:
When addressing as I/O Register: address offset is 0x3D
Bit15141312111098
SP[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit76543210
SP[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset0000000x

Bits 15:0 – SP[15:0]: Stack Pointer Address

Stack Pointer Address