Shared Use of SPI Programming Lines

If additional devices are connected to the ISP lines, the programmer must be protected from any device, other than the AVR device, that may try to drive the lines. This is important with the SPI bus, as it is similar to the ISP interface. Applying series resistors on the SPI lines, as depicted in Connecting the SPI Lines to the ISP Interface, is the easiest way to achieve this. Typically, the resistor value R can be of 330Ω(1).

Figure 1. Connecting the SPI Lines to the ISP Interface
Note:
  1. These typical values are used to limit the input current to 10 mA for a supply voltage (VCC) of 3.3V. It may vary depending on the programmer/debugger used and the requirements of specific hardware design.
  2. The AVR device will never drive the SPI lines in a programming situation. The AVR device is held in Reset to enter Programming mode, which puts all AVR device pins to tri-states.

In a single application, multiple AVR devices can share the same ISP interface. This enables programming of all the devices through a minimal interface. However, if there are no special design considerations, then all the AVR devices will respond to the ISP instructions. The SPI clock lines should be separately provided (can be gated using jumpers or DIP switches) so that only one AVR device at a time receives SPI clock. Other SPI lines (MOSI and MISO) can be shared. This method ensures that AVR devices are separated from the programmer by the same protection resistors since they are all held in Reset while the ISP Reset line is activated. The ISP clock can be gated using jumpers or DIP switches.

An alternate solution is to use multiple ISP interfaces, one for each device, all protected separately with series resistors.