Inherent gain and offset errors affect the absolute accuracy of the ADC.
The offset error is defined as the deviation of the ADC's actual transfer function from ideal straight line at zero input voltage.
The gain error is defined as the deviation of the last output step's midpoint from the ideal straight line, after compensating for offset error.
The offset correction value is subtracted from the converted data before the result is ready. The gain correction value is multiplied with the offset corrected value.
When enabled, a given set of offset and gain correction values can be applied to the sampled data in hardware, giving a corrected stream of sample data to the user application at the cost of an increased sample latency.
In single conversion, a latency of 13 ADC Generic Clock cycles is added for the final sample result availability. As the correction time is always less than the propagation delay, in free running mode this latency appears only during the first conversion. After the first conversion is complete, future conversion results are available at the defined sampling rate.