Power Domain Gating

Power domain gating allows power saving by reducing the voltage in logic areas in the device to a low-power supply. The feature is available in Standby sleep mode and will reduce the voltage in domains where all peripherals are idle. Internal logic will maintain its content, meaning the corresponding peripherals will not need to be reconfigured when normal operating voltage is returned. Most power domains can be in the following three states:

The SAM L21 device contains three power domains which can be controlled using power domain gating, namely PD0, PD1, and PD2. These power domains can be configured to the following cases:

Power domains can be linked to each other, it allows a power domain (PDn) to be kept in active state if the inferior power domain (PDn-1) is in active state too.

Table 1 illustrates the four cases to consider in standby mode.

Table 1. Sleep Mode versus Power Domain State Overview

Sleep mode

PD0

PD1

PD2

PDTOP

PDBACKUP

Idle

active

active

active

active

active

Standby - Case 1

active

active

active

active

active

Standby - Case 2

active

active

retention

active

active

Standby - Case 3

active

retention

retention

active

active

Standby - Case 4

retention

retention

retention

active

active

Backup

off

off

off

off

active

Off

off

off

off

off

off